An analog-to-digital converter (ADC) converts an analog signal to a digital signal. The analog input signal may be static or may be a dynamic waveform. The digital output signal may be a multi-bit binary number or a sequence of pulses. There are many types of ADC's, with each type having many variations and enhancements. The following background discussion outlines four types of prior art ADC's.
FIG. 1 illustrates an example of a class of ADCs called integrating ADCs. The particular embodiment of FIG. 1 is sometimes called a Wilkenson ADC, but there are variations, for example, dual-slope integrating ADCs. A switch SW switches one side of a capacitor C (and the input of an operational amplifier 102) between a current source 104 and an input voltage VIN. SW initially switches capacitor C (and the input of the operational amplifier) to VIN, and the capacitor C charges to VIN. Then SW switches the capacitor C (and an input of the operational amplifier) to the current source, and the capacitor discharges linearly. A comparator 106 determines when the output of the operational amplifier reaches zero. A counter 108 counts clock pulses from the time the current source starts discharging the capacitor until the time the comparator indicates the capacitor has discharged. A maximum input voltage will result in a known maximum count of clock pulses. The digital output D is the multi-bit binary value of the digital counter 108.
FIG. 2 illustrates a flash ADC 200. A reference voltage VREF is divided by a resistor ladder. An input voltage VIN is compared to each fraction of VREF by a bank of comparators 202. Digital logic circuit 204 converts the comparator outputs to a multi-bit binary value D.
FIG. 3 illustrates a delta-modulator (or ADC) 300. An input voltage VIN is compared to a feedback signal by a comparator 302. If the output of the comparator is high, a clock generates a pulse at the output of a flip-flop 304. If the output of the comparator is low, no pulse is generated. An integrator 306 provides the feedback signal as a scaled running average of the flip-flop output pulses. The digital output D is a series of pulses, and the number of pulses per unit of time represents the value of VIN.
FIG. 4A illustrates a sigma-delta ADC 400. An input voltage VIN is summed with a feedback voltage at a summing junction 402. The difference between VIN and the feedback voltage is integrated by an integrator 404. A comparator 406 compares the output of the integrator to ground. If the output of the integrator is positive, the comparator output is high. If the output of the integrator is negative, the comparator output is zero. The output of the comparator is converted to an analog voltage for feedback by a digital-to-analog converter (DAC) 408. In FIG. 4, the DAC 408 is depicted as a switch. If the output of the comparator is high, the switch selects +V as the feedback signal. If the output of the comparator is zero, the switch selects −V as the feedback signal. The integral of the feedback signal over time is equal to VIN. The digital output D is a series of binary transitions, and the average value of the binary output per unit of time represents the value of VIN.
For a sigma-delta ADC as in FIG. 4A, there are two common ways to improve signal-to-noise: (1) adding additional integration stages, and (2) using a multi-bit quantizer (another ADC) instead of a single-bit comparator. Both of these enhancements are illustrated in FIG. 4B. In FIG. 4B, an input signal VIN is summed with a feedback signal at a summing junction 410, and the difference is integrated by a first integrator 412. The output of the first integrator is also summed with the feedback signal by a summing junction 414, and the difference is integrated by a second integrator 416. Each integration stage is called an order, so the ADC in FIG. 4B is a second-order sigma-delta ADC. In contrast to the binary output comparator 406 in FIG. 4A, in the ADC in FIG. 4B the output of the second integrator is quantized by a multi-bit flash ADC 418 (as in FIG. 2). The multi-bit output of the flash ADC 418 controls a DAC 420. In FIG. 4B, DAC 420 is depicted as a switch that selects from more than two fixed voltages (four are depicted as an example) for a feedback signal. Because of the multi-bit quantizer 418, the ADC in FIG. 4B is a second-order multi-bit sigma-delta ADC.
All ADC's have some level of noise in the output signal, some quantization error (the difference between the analog input and the digitized signal), some non-linearity (the output is not a perfectly linear function of the input), other imperfections inherent in the conversion process, and imperfections resulting from imperfect components. There is an ongoing need for improved signal-to-noise, reduced quantization error, reduced power consumption, and reduced cost for ADC's.